Uart3 Serial Port, How to locate the source code used by FreeBSD / GhostBSD-Arm64
Uart3 Serial Port, How to locate the source code used by FreeBSD / GhostBSD-Arm64
Edit the file /etc/rc.conf and add the bash execution line 'set -x' This will produce verbose output from 'make buildkernel KERNCONF=GENERIC-VCHIC -DNO_CLEAN
Issue the 'make buildkernel' command and direct stdout & stderr to a file.
make buildkernel KERNCONF=GENERIC-VCHIQ -DNO_CLEAN > BRCM64_GENERIC-VCHIQ.txt 2>&1
later you can run make installkernel KERNCONF=GENERIC-VCHIQ
===> wlan_tkip (install)install -T release -o root -g wheel -m 555 wlan_tkip.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 wlan_tkip.ko.debug /usr/lib/debug/boot/kernel/===> wlan_wep (install)install -T release -o root -g wheel -m 555 wlan_wep.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 wlan_wep.ko.debug /usr/lib/debug/boot/kernel/===> wlan_xauth (install)install -T release -o root -g wheel -m 555 wlan_xauth.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 wlan_xauth.ko.debug /usr/lib/debug/boot/kernel/===> xdr (install)install -T release -o root -g wheel -m 555 xdr.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 xdr.ko.debug /usr/lib/debug/boot/kernel/===> xl (install)install -T release -o root -g wheel -m 555 if_xl.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 if_xl.ko.debug /usr/lib/debug/boot/kernel/===> xz (install)install -T release -o root -g wheel -m 555 xz.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 xz.ko.debug /usr/lib/debug/boot/kernel/===> zfs (install)install -T release -o root -g wheel -m 555 zfs.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 zfs.ko.debug /usr/lib/debug/boot/kernel/===> zlib (install)install -T release -o root -g wheel -m 555 zlib.ko /boot/kernel/install -T dbg -o root -g wheel -m 555 zlib.ko.debug /usr/lib/debug/boot/kernel/kldxref /boot/kernel-------------------------------------------------------------->>> Installing kernel GENERIC-VCHIQ completed on Fri Feb 16 22:41:08 PST 2024--------------------------------------------------------------77.24 real 31.76 user 23.51 sysroot@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src #
ls -lh BRCM*
-rw-r--r-- 1 root wheel 44K Feb 16 00:24 BRCM64_GENERIC_VCHIQ.txt
-rw-r--r-- 1 root wheel 3.6K Feb 15 23:59 BRCM64_test.txt
less BRCM64_G*.txt search for uart
/usr/ghost14/ghostbsd-src/sys/dev/uart/uart_if.m
===> uart (all)
===> udf (all)
root@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev/uart # ls -lh
you have mail
total 191
-rw-r--r-- 1 root wheel 3.2K Oct 25 04:19 uart_bus_acpi.c
-rw-r--r-- 1 root wheel 7.4K Oct 25 04:19 uart_bus_fdt.c
-rw-r--r-- 1 root wheel 7.6K Oct 25 04:19 uart_bus_isa.c
-rw-r--r-- 1 root wheel 12K Oct 25 04:19 uart_bus_pci.c
-rw-r--r-- 1 root wheel 2.7K Oct 25 04:19 uart_bus_puc.c
-rw-r--r-- 1 root wheel 3.3K Oct 25 04:19 uart_bus_scc.c
-rw-r--r-- 1 root wheel 5.9K Oct 25 04:19 uart_bus.h
-rw-r--r-- 1 root wheel 21K Oct 25 04:19 uart_core.c
-rw-r--r-- 1 root wheel 5.2K Oct 25 04:19 uart_cpu_acpi.c
-rw-r--r-- 1 root wheel 2.5K Oct 25 04:19 uart_cpu_acpi.h
-rw-r--r-- 1 root wheel 3.6K Oct 25 04:19 uart_cpu_arm64.c
-rw-r--r-- 1 root wheel 3.1K Oct 25 04:19 uart_cpu_fdt.c
-rw-r--r-- 1 root wheel 2.3K Oct 25 04:19 uart_cpu_fdt.h
-rw-r--r-- 1 root wheel 5.4K Oct 25 04:19 uart_cpu_powerpc.c
-rw-r--r-- 1 root wheel 3.6K Oct 25 04:19 uart_cpu_x86.c
-rw-r--r-- 1 root wheel 4.5K Oct 25 04:19 uart_cpu.h
-rw-r--r-- 1 root wheel 2.4K Oct 25 04:19 uart_dbg.c
-rw-r--r-- 1 root wheel 17K Oct 25 04:19 uart_dev_imx.c
-rw-r--r-- 1 root wheel 8.3K Oct 25 04:19 uart_dev_imx.h
-rw-r--r-- 1 root wheel 8.8K Oct 25 04:19 uart_dev_lowrisc.c
-rw-r--r-- 1 root wheel 2.7K Oct 25 04:19 uart_dev_lowrisc.h
-rw-r--r-- 1 root wheel 13K Oct 25 04:19 uart_dev_msm.c
-rw-r--r-- 1 root wheel 7.1K Oct 25 04:19 uart_dev_msm.h
-rw-r--r-- 1 root wheel 12K Oct 25 04:19 uart_dev_mu.c
-rw-r--r-- 1 root wheel 15K Oct 25 04:19 uart_dev_mvebu.c
-rw-r--r-- 1 root wheel 29K Oct 25 04:19 uart_dev_ns8250.c
-rw-r--r-- 1 root wheel 2.3K Oct 25 04:19 uart_dev_ns8250.h
-rw-r--r-- 1 root wheel 16K Oct 25 04:19 uart_dev_pl011.c
-rw-r--r-- 1 root wheel 12K Oct 25 04:19 uart_dev_quicc.c
-rw-r--r-- 1 root wheel 7.2K Oct 25 04:19 uart_dev_snps.c
-rw-r--r-- 1 root wheel 3.9K Oct 25 04:19 uart_dev_ti8250.c
-rw-r--r-- 1 root wheel 15K Oct 25 04:19 uart_dev_z8530.c
-rw-r--r-- 1 root wheel 6.0K Oct 25 04:19 uart_if.m
-rw-r--r-- 1 root wheel 1.7K Oct 25 04:19 uart_ppstypes.h
-rw-r--r-- 1 root wheel 7.3K Oct 25 04:19 uart_subr.c
-rw-r--r-- 1 root wheel 10K Oct 25 04:19 uart_tty.c
-rw-r--r-- 1 root wheel 3.7K Oct 25 04:19 uart.h
root@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev/uart # less uart_dev_pl011.c
root@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys # grep -inr 0x7e20 *
contrib/device-tree/src/arm/bcm2711.dtsi:132: reg = <0x7e201400 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:143: reg = <0x7e201600 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:154: reg = <0x7e201800 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:165: reg = <0x7e201a00 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:176: reg = <0x7e204600 0x0200>;
contrib/device-tree/src/arm/bcm2711.dtsi:186: reg = <0x7e204800 0x0200>;
contrib/device-tree/src/arm/bcm2711.dtsi:196: reg = <0x7e204a00 0x0200>;
contrib/device-tree/src/arm/bcm2711.dtsi:206: reg = <0x7e204c00 0x0200>;
contrib/device-tree/src/arm/bcm2711.dtsi:216: reg = <0x7e205600 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:226: reg = <0x7e205800 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:236: reg = <0x7e205a00 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:246: reg = <0x7e205c00 0x200>;
contrib/device-tree/src/arm/bcm2711.dtsi:256: reg = <0x7e206000 0x100>;
contrib/device-tree/src/arm/bcm2711.dtsi:263: reg = <0x7e207000 0x100>;
contrib/device-tree/src/arm/bcm2711.dtsi:270: reg = <0x7e20a000 0x100>;
contrib/device-tree/src/arm/bcm2711.dtsi:277: reg = <0x7e20c800 0x28>;
contrib/device-tree/src/arm/bcm2835-common.dtsi:82: reg = <0x7e206000 0x100>;
contrib/device-tree/src/arm/bcm2835-common.dtsi:88: reg = <0x7e207000 0x100>;
contrib/device-tree/src/arm/bcm283x.dtsi:109: reg = <0x7e200000 0xb4>;
contrib/device-tree/src/arm/bcm283x.dtsi:306: reg = <0x7e201000 0x200>;
contrib/device-tree/src/arm/bcm283x.dtsi:316: reg = <0x7e202000 0x100>;
/root/raspi4b/Mechanical_Drawings/bcm2711-peripherals.pdf
section 11.5 UART Register addresses
11.5. Register View
The PL011 UARTs are mapped onto the following base addresses:
• UART0: 0x7e201000
• UART2: 0x7e201400
• UART3: 0x7e201600
• UART4: 0x7e201800
• UART5: 0x7e201a00
They have the following memory-mapped registers.
uart3: serial@7e201600 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201600 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
# status = "disabled";
status = "enabled";
};
FreeBSD blog information on GPIO drivers
http://mrp3.com/fbsd_rpi.html GPIO control example gpioctl
Using the 'gpioctl' application
sudo ofwdump -a check for enabled uarts iwth device node names
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp % cd overlays
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp/overlays % ls
disable-bt.dtbo uart0.dtbo uart4.dtbo
miniuart-bt.dtbo uart1.dtbo uart5.dtbo
mmc.dtbo uart2.dtbo
pwm.dtbo uart3.dtbo
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp/overlays % cat uart3.dtbo
brcm,bcm2711fragment@0
����__overlay_default ����*okayfragment@1
����__dormant__1;__overrides__E=1__fixups__L/fragment@0:target:09R/fragment@0/__overlay__:pinctrl-0:0/fragment@1:target:0 compatibletargetpinctrl-namespinctrl-0statusbrcm,pinsbrcm,pullctsrtsuart3uart3_pinsfred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp/overlays % cat uart5.dtbo
brcm,bcm2711fragment@0
����__overlay_default ����*okayfragment@1
����__dormant__1
;__overrides__E=1__fixups__L/fragment@0:target:09R/fragment@0/__overlay__:pinctrl-0:0/fragment@1:target:0 compatibletargetpinctrl-namespinctrl-0statusbrcm,pinsbrcm,pullctsrtsuart5uart5_pinsfred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp/overlays % ls -lh
total 320
-rwxr-xr-x 1 root wheel 1.0K Mar 3 2021 disable-bt.dtbo
-rwxr-xr-x 1 root wheel 1.8K Apr 5 2023 miniuart-bt.dtbo
-rwxr-xr-x 1 root wheel 1.2K Mar 3 2021 mmc.dtbo
-rwxr-xr-x 1 root wheel 985B Mar 3 2021 pwm.dtbo
-rwxr-xr-x 1 root wheel 936B Apr 5 2023 uart0.dtbo
-rwxr-xr-x 1 root wheel 988B Apr 5 2023 uart1.dtbo
-rwxr-xr-x 1 root wheel 589B Apr 5 2023 uart2.dtbo
-rwxr-xr-x 1 root wheel 589B Apr 5 2023 uart3.dtbo
-rwxr-xr-x 1 root wheel 589B Apr 5 2023 uart4.dtbo
-rwxr-xr-x 1 root wheel 589B Apr 5 2023 uart5.dtbo
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp/overlays % cd ..
fred@Ghost14-selfbuilt-rpi4B-nginx-src/arm/bcm2711-rpi.dtsitst1:/mnt/esp % ls c*
config_august12.txt config.txt config.txt.original
config_june22.txt config.txt.orig
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp % cp -p config.txt config_feb24.txt
cp: config_feb24.txt: Permission denied
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp % sudo cp -p config.txt config_feb24.txt
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/mnt/esp % sudo vi config.txt
https://github.com/jadonk/bonescript/blob/64732854d4c296de8792d5d4c49639ae5f5ecede/src/bone.js Github with the Beagle Bone Black dts or dtbo files
Get extra UARTS 2,3,4 to work on Beagle Bone Black board.
In the ghostbsd-src/sys/dev There is one file with the dtsi or dtb file that needs to be edited.
/usr/ghost14/ghostbsd-src/sys/contrib/device-tree/src Enable your Uarts 3 & 5 Here
src/arm/bcm2711-rpi-4-b.dts use and edit this file: bcm2711.dtsi.
bcm2711_registers_list.txt bcm4708-netgear-r6300-v2.dts bcm6878.dtsi
bcm2711-rpi-4-b.dts bcm4708-smartrg-sr400ac.dts bcm7445-bcm97445svmb.dts
bcm2711-rpi-400.dts bcm4708.dtsi bcm7445.dtsi
bcm2711-rpi-cm4-io.dts bcm47081-asus-rt-n18u.dts bcm911360_entphn.dts
bcm2711-rpi-cm4.dtsi bcm47081-buffalo-wzr-600dhp2.dts bcm911360k.dts
bcm2711-rpi.dtsi bcm47081-buffalo-wzr-900dhp.dts bcm94708.dts
bcm2711.dtsi
~~~~~~~~~~~~~~~~~~~~~~~~~
// SPDX-License-Identifier: GPL-2.0 from file bcm2711.dtsi
#include "bcm283x.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/bcm2835-pm.h>
/ {
compatible = "brcm,bcm2711";
#address-cells = <2>;
#size-cells = <1>;
interrupt-parent = <&gicv2>;
vc4: gpu {
compatible = "brcm,bcm2711-vc5";
status = "disabled";
};
clk_27MHz: clk-27M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <27000000>;
clock-output-names = "27MHz-clock";
};
clk_108MHz: clk-108M {
bcm2711.dtsi: unmodified: line 1
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
&system_timer {
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
};
&txp {
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
};
&uart0 {
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
&uart1 {
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
};
# add uart3 and uart5 interrupts here.
Check other code areas and files
#include "bcm283x.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/bcm2835-pm.h>
&uart3 {
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
&uart5 {
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
&usb {
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
};
&vec {
compatible = "brcm,bcm2711-vec";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
};
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/contrib/device-tree/src/arm % ls -l bcm27*
-rw-r--r-- 1 root wheel 5268 Feb 16 13:28 bcm2711_registers_list.txt
-rw-r--r-- 1 root wheel 4267 Oct 25 04:19 bcm2711-rpi-4-b.dts
-rw-r--r-- 1 root wheel 732 Oct 25 04:19 bcm2711-rpi-400.dts
-rw-r--r-- 1 root wheel 2105 Oct 25 04:19 bcm2711-rpi-cm4-io.dts
-rw-r--r-- 1 root wheel 2206 Oct 25 04:19 bcm2711-rpi-cm4.dtsi
-rw-r--r-- 1 root wheel 1522 Oct 25 04:19 bcm2711-rpi.dtsi
-rw-r--r-- 1 root wheel 26043 Feb 16 22:21 bcm2711.dtsi
edit first bcm2711-rpi-4-b.dts examine bcm2711-rpi-400.dts
/usr/ghost14/ghostbsd-src/sys/contrib/device-tree/src/arm % vi bcm2711.dtsi
uart2: serial@7e201400 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201400 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
status = "disabled";
};
uart3: serial@7e201600 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201600 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
resets = <&dvp 0>;
interrupt-parent = <&aon_intr>;
interrupts = <0>, <1>, <2>,
<3>, <4>, <5>;
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"wakeup", "hpd-connected", "hpd-removed";
ddc = <&ddc0>;
dmas = <&dma 10>;
dma-names = "audio-rx";
status = "disabled";
};
ddc0: i2c@7ef04500 {
compatible = "brcm,bcm2711-hdmi-i2c";
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
reg-names = "bsc", "auto-i2c";
clock-frequency = <97500>;
status = "disabled";
};
hdmi1: hdmi@7ef05700 {
compatible = "brcm,bcm2711-hdmi1";
reg = <0x7ef05700 0x300>,
<0x7ef05300 0x200>,
<0x7ef05f00 0x80>,
<0x7ef05f80 0x80>,
<0x7ef06b00 0x200>,
uart2: serial@7e201400 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201400 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
status = "disabled";
};
uart3: serial@7e201600 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201600 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
resets = <&dvp 0>;
interrupt-parent = <&aon_intr>;
interrupts = <0>, <1>, <2>,
<3>, <4>, <5>;
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"wakeup", "hpd-connected", "hpd-removed";
ddc = <&ddc0>;
dmas = <&dma 10>;
dma-names = "audio-rx";
# status = "disabled";
status = "okay";
};
ddc0: i2c@7ef04500 {
compatible = "brcm,bcm2711-hdmi-i2c";
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
reg-names = "bsc", "auto-i2c";
clock-frequency = <97500>;
status = "disabled";
};
hdmi1: hdmi@7ef05700 {
compatible = "brcm,bcm2711-hdmi1";
reg = <0x7ef05700 0x300>,
<0x7ef05300 0x200>,
<0x7ef05f00 0x80>,
<0x7ef05f80 0x80>,
<0x7ef06b00 0x200>,
<0x7ef06f00 0x400>,
<0x7ef00280 0x80>,
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
status = "disabled";
};
uart5: serial@7e201a00 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201a00 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
# status = "disabled";
status = "okay";
};
<0x7ef06f00 0x400>,
<0x7ef00280 0x80>,
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
status = "disabled";
};
uart5: serial@7e201a00 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7e201a00 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
arm,primecell-periphid = <0x00241011>;
# status = "disabled";
status = "okay";
};
Edit file /etc/ttys
edit file /etc/ttys # edit ttyu1 , ttyu2, add line ttyu4 #ttyu1 ~= uart 3 ttyu2 ~= uart 5
# uart3 0x7e201600 uart4 0x7e201800 uart5 0x7e201a00
# Serial terminals
# The 'dialup' keyword identifies dialin lines to login, fingerd etc.
ttyu0 "/usr/libexec/getty 3wire" vt100 onifconsole secure
ttyu1 "unknown" none onifconsole secure
ttyu2 "unknown" none onifconsole secure
# ttyu1 "/usr/libexec/getty 3wire" vt100 onifconsole secure
# ttyu2 "/usr/libexec/getty 3wire" vt100 onifconsole secure
ttyu3 "/usr/libexec/getty 3wire" vt100 onifconsole secure
ttyu4 "unknown" none onifconsole secure
# Dumb console
dcons "/usr/libexec/getty std.115200" vt100 off secure
Rebuild the kernel KERNCONF=GENERIC-VCHIQ
root@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src # time make buildkernel KERNCONF=GENERIC-VCHIQ -DNO_CLEAN
===> usb/ipheth (all)
===> usb/muge (all)
===> usb/ure (all)
===> usb/urndis (all)
===> usb/usfs (all)
===> usb/umass (all)
===> usb/urio (all)
===> usb/uacpi (all)
===> usb/quirk (all)
===> usb/template (all)
===> usb/g_audio (all)
===> usb/g_keyboard (all)
===> usb/g_modem (all)
===> usb/g_mouse (all)
===> vge (all)
===> videomode (all)
===> virtio (all)
===> virtio/virtio (all)
===> virtio/pci (all)
===> virtio/network (all)
===> virtio/block (all)
===> virtio/balloon (all)
===> virtio/scsi (all)
===> virtio/random (all)
===> virtio/console (all)
===> vkbd (all)
===> vmware (all)
===> vmware/pvscsi (all)
===> vmware/vmxnet3 (all)
===> vr (all)
===> vte (all)
===> wlan (all)
===> wlan_acl (all)
===> wlan_amrr (all)
===> wlan_ccmp (all)
===> wlan_rssadapt (all)
===> wlan_tkip (all)
===> wlan_wep (all)
===> wlan_xauth (all)
===> xdr (all)
===> xl (all)
===> xz (all)
===> zfs (all)
===> zlib (all)
56.10 real 35.52 user 17.29 sys
--------------------------------------------------------------
>>> Kernel build for GENERIC-VCHIQ completed on Tue Feb 20 01:04:12 PST 2024
--------------------------------------------------------------
>>> Kernel(s) GENERIC-VCHIQ built in 58 seconds, ncpu: 4
--------------------------------------------------------------
58.30 real 36.18 user 18.18 sys
Instructions to "time make installkernel KERNCONF=GENERIC-VCHIQ"
===> wlan (install)
install -T release -o root -g wheel -m 555 wlan.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_acl (install)
install -T release -o root -g wheel -m 555 wlan_acl.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_acl.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_amrr (install)
install -T release -o root -g wheel -m 555 wlan_amrr.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_amrr.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_ccmp (install)
install -T release -o root -g wheel -m 555 wlan_ccmp.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_ccmp.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_rssadapt (install)
install -T release -o root -g wheel -m 555 wlan_rssadapt.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_rssadapt.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_tkip (install)
install -T release -o root -g wheel -m 555 wlan_tkip.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_tkip.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_wep (install)
install -T release -o root -g wheel -m 555 wlan_wep.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_wep.ko.debug /usr/lib/debug/boot/kernel/
===> wlan_xauth (install)
install -T release -o root -g wheel -m 555 wlan_xauth.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 wlan_xauth.ko.debug /usr/lib/debug/boot/kernel/
===> xdr (install)
install -T release -o root -g wheel -m 555 xdr.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 xdr.ko.debug /usr/lib/debug/boot/kernel/
===> xl (install)
install -T release -o root -g wheel -m 555 if_xl.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 if_xl.ko.debug /usr/lib/debug/boot/kernel/
===> xz (install)
install -T release -o root -g wheel -m 555 xz.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 xz.ko.debug /usr/lib/debug/boot/kernel/
===> zfs (install)
install -T release -o root -g wheel -m 555 zfs.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 zfs.ko.debug /usr/lib/debug/boot/kernel/
===> zlib (install)
install -T release -o root -g wheel -m 555 zlib.ko /boot/kernel/
install -T dbg -o root -g wheel -m 555 zlib.ko.debug /usr/lib/debug/boot/kernel/
kldxref /boot/kernel
--------------------------------------------------------------
>>> Installing kernel GENERIC-VCHIQ completed on Tue Feb 20 01:08:23 PST 2024
--------------------------------------------------------------
root@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src #
Jorge Schrauwen
2018-08-20 20:02:26 UTC
I am running into the same problem and made a tiny bit of progress on this.
echo 'hw.fdt.console="NO"' >> /boot/loader.conf.local
Will disable the serial console! uart0 aka /dev/cuau0 is now not used by the FreeBSD console. This of course still needs a u-boot compiled with nulldev for stdin, stdout, and stderr.
I came upon this undocumented (?) kernel tunable after a long search and someone mentioning on twitter to clear the fdt's /chosen/stdout-path entry. Setting this tunable to a non existing device will also skip the hardcoded fallback. see /usr/src/sys/dev/uart/uart_cpu_fdt.c This still results in a unusable /dev/cuau0 for me though I think it might be because 112500 buadrate is hardcoded in the PL011 driver. (Still looking into this.) Hopefully this is of some use to someone.
https://stackoverflow.com/questions/68513349/why-does-the-device-tree-have-to-list-interrupts-for-a-uart-device
Driver documentation is available at https://www.kernel.org/doc/Documentation/devicetree/bindings/serial/nvidia%2Ctegra20-hsuart.txt
According to this forum https://forums.developer.nvidia.com/t/enabling-interrupts-for-uart-xavier-agx/166269 interrupts are used to prevent regular polling on UART.
Registering handler on this interrupt allows to only run code when effective data are received and available in DMA buffer, or when the complete outgoing message provided in DMA has been sent. Such a DMA usage example is available at: UART Tx mode with DMA enabled
Memory address 0x70006000 is the base location for UARTA controller registers (there are 4 UART [A,B,C,D] in Tegra 2) where to write commands or read status. These documents may help to understand:
- https://docs.freebsd.org/en/articles/serial-uart/index.html
- https://www.lammertbies.nl/comm/info/serial-uart
- https://www.lammertbies.nl/comm/info/rs-232-io
For instance, the Scratch Register (SCR +0x07) can be used to write and read back any byte as a way to test UART is present and controller operates as expected.
I recommend you to download reference documentation, chapter 22 for UART, available from https://developer.nvidia.com/embedded/tegra-2-reference
The sourcecode
Usage:
git clone https://gitlab.com/Teuniz/RS-232.git
Include rs232.h in your program sourcecode (like: #include "rs232.h") and compile and link rs232.c (add rs232.c to your project).
Functions
int RS232_OpenComport(int comport_number, int baudrate, const char * mode, int flowctrl)Opens the comport, comportnumber starts with 0 (see the list of numbers).
Baudrate is expressed in baud per second i.e 115200 (see the list of possible baudrates).
Mode is a string in the form of "8N1", "7E2", etc.
8N1 means eight databits, no parity, one stopbit. If in doubt, use 8N1 (see the list of possible modes).
If flowctrl is set to 0, no flow control is used.
If flowctrl is set to 1, hardware flow control is enabled using the RTS/CTS lines.
Returns 1 in case of an error.
int RS232_PollComport(int comport_number, unsigned char *buf, int size)
Gets characters from the serial port (if any). Buf is a pointer to a buffer
and size the size of the buffer in bytes.
Returns the amount of received characters into the buffer. This can be less than size or zero!
It does not block or wait, it returns immediately, no matter if any characters have been received or not.
After succesfully opening the COM-port, connect this function to a timer.
The timer should have an interval of approx. 100 milliSeconds.
Do not forget to stop the timer before closing the COM-port.
int RS232_SendByte(int comport_number, unsigned char byte)
Sends a byte via the serial port. Returns 1 in case of an error.
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev % grep -inr "hw.fdt.console" *
uart/uart_bus_fdt.c:194: cp = kern_getenv("hw.fdt.console");
-rw-r--r-- 1 root wheel 6075 Oct 25 04:19 uart_bus.h
-rw-r--r-- 1 root wheel 3258 Oct 25 04:19 uart_bus_acpi.c
-rw-r--r-- 1 root wheel 7530 Oct 25 04:19 uart_bus_fdt.c
-rw-r--r-- 1 root wheel 7824 Oct 25 04:19 uart_bus_isa.c
-rw-r--r-- 1 root wheel 12551 Oct 25 04:19 uart_bus_pci.c
-rw-r--r-- 1 root wheel 2776 Oct 25 04:19 uart_bus_puc.c
-rw-r--r-- 1 root wheel 3358 Oct 25 04:19 uart_bus_scc.c
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev/uart %
uart_bus_fdt.c:194: cp = kern_getenv("hw.fdt.console");
uart_subr.c:212: * Check the environment variables "hw.uart.console" and
uart_subr.c:219: cp = kern_getenv("hw.uart.console");
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev/uart %
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev % grep -inr "hw.*.console" *
dcons/dcons_crom.c:69:TUNABLE_INT("hw.firewire.dcons_crom.force_console", &force_console);
liquidio/lio_main.c:81:TUNABLE_ULONG("hw.lio.console_bitmask", &console_bitmask);
uart/uart_bus_fdt.c:194: cp = kern_getenv("hw.fdt.console");
uart/uart_subr.c:212: * Check the environment variables "hw.uart.console" and
uart/uart_subr.c:219: cp = kern_getenv("hw.uart.console");
usb/serial/usb_serial.c:109:SYSCTL_INT(_hw_usb_ucom, OID_AUTO, device_mode_console, CTLFLAG_RW,
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev %
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev/uart % ls
uart.h uart_cpu_acpi.c uart_dev_lowrisc.c uart_dev_snps.c
uart_bus.h uart_cpu_acpi.h uart_dev_lowrisc.h uart_dev_ti8250.c
uart_bus_acpi.c uart_cpu_arm64.c uart_dev_msm.c uart_dev_z8530.c
uart_bus_fdt.c uart_cpu_fdt.c uart_dev_msm.h uart_if.m
uart_bus_isa.c uart_cpu_fdt.h uart_dev_mu.c uart_ppstypes.h
uart_bus_pci.c uart_cpu_powerpc.c uart_dev_mvebu.c uart_subr.c
uart_bus_puc.c uart_cpu_x86.c uart_dev_ns8250.c uart_tty.c
uart_bus_scc.c uart_dbg.c uart_dev_ns8250.h
uart_core.c uart_dev_imx.c uart_dev_pl011.c
uart_cpu.h uart_dev_imx.h uart_dev_quicc.c
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/dev/uart % grep -inr "interrupt" *
uart.h:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_bus.h:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_bus.h:85: struct resource *sc_ires; /* Interrupt resource. */
uart_bus.h:91: bool sc_fastintr:1; /* This UART uses fast interrupts. */
uart_bus.h:96: bool sc_polled:1; /* This UART has no interrupts. */
uart_bus_acpi.c:21: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_bus_fdt.c:24: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_bus_isa.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_bus_pci.c:22: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_bus_puc.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_bus_scc.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_core.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_core.c:36:#include <sys/interrupt.h>
uart_core.c:163: * both edges. However, when the pulse width is close to our interrupt
uart_core.c:265: * Schedule a soft interrupt. We do this on the 0 to !0 transition
uart_core.c:266: * of the TTY pending interrupt status.
uart_core.c:314: * So, instead of having multiple overrun interrupts in close proximity
uart_core.c:315: * to each other and possibly pessimizing UART interrupt latency for
uart_core.c:369: * We pass the signals to the software interrupt handler for further
uart_core.c:372: * than 1 hardware interrupt between software interrupts.
uart_core.c:601: * Protect ourselves against interrupts while we're not completely
uart_core.c:602: * finished attaching and initializing. We don't expect interrupts
uart_core.c:685: * Don't use interrupts if we couldn't clear any pending interrupt
uart_core.c:704: device_printf(dev, "could not activate interrupt\n");
uart_core.c:711: /* No interrupt resource. Force polled mode. */
uart_core.c:722: printf("%sfast interrupt", sep);
uart_cpu.h:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_cpu_acpi.c:24: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_cpu_acpi.h:24: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_cpu_arm64.c:22: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_cpu_fdt.c:24: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_cpu_fdt.h:20: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_cpu_powerpc.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_cpu_x86.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dbg.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dev_imx.c:24: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_imx.c:60: * The hardare FIFOs are 32 bytes. We want an interrupt when there are 24 bytes
uart_dev_imx.c:64: * to get into the interrupt handler and service the fifo.
uart_dev_imx.c:212: * interrupts are signaled. The tx value is interpetted as "when there
uart_dev_imx.c:393: /* Clear all pending interrupts. */
uart_dev_imx.c:503: /* Read pending interrupts */
uart_dev_imx.c:506: /* ACK interrupts */
uart_dev_imx.c:565: * when we get a tx-ready interrupt.
uart_dev_imx.c:584: * Empty the rx fifo. We get the RRDY interrupt when IMX_RXFIFO_LEVEL
uart_dev_imx.c:634: * because we got the TRDY (low-water reached) interrupt we know at
uart_dev_imx.h:22: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_lowrisc.c:27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_lowrisc.c:206: /* TODO: clear all pending interrupts. */
uart_dev_lowrisc.c:307: * when we get a tx-ready interrupt.
uart_dev_lowrisc.h:27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_msm.c:21: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dev_msm.c:164: /* Reset interrupt mask register. */
uart_dev_msm.c:169: * TX watermark value is set to 0 - interrupt is generated when
uart_dev_msm.c:178: * Configure Interrupt Programming Register.
uart_dev_msm.c:225: * be empty as indicated by TX_READY interrupt in IMR register
uart_dev_msm.c:230: * If not wait for TX_READY interrupt.
uart_dev_msm.c:348: /* Configure Interrupt Mask register IMR */
uart_dev_msm.c:373: /* TX FIFO is empty now, enable TX_READY interrupt */
uart_dev_msm.c:380: * this will be cleared when TXIDLE interrupt occurs.
uart_dev_msm.c:405: /* Initialize Receive Path and interrupt */
uart_dev_msm.c:473: /* Stale RX interrupt */
uart_dev_msm.c:482: /* TX READY interrupt */
uart_dev_msm.c:537: * XXX: Turn off all interrupts to enter polling mode. Leave the
uart_dev_msm.c:554: * Restore previous interrupt mask
uart_dev_msm.h:20: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_msm.h:111:/* UART Interrupt Mask Register */
uart_dev_msm.h:133:/* UART Interrupt Programming Register */
uart_dev_msm.h:142:/* Interrupt is generated when FIFO level is less than or equal to this value */
uart_dev_msm.h:146:/* Interrupt generated when no of words in RX FIFO is greater than this value */
uart_dev_msm.h:193:/* UART Masked Interrupt Status Register */
uart_dev_msm.h:196:/* UART Interrupt Status Register */
uart_dev_mu.c:19: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_mu.c:46: * - Receive Time-out interrupt
uart_dev_mu.c:82: * Also bits 2 and 3 are required to enable interrupts.
uart_dev_mu.c:210: /* Mask all interrupts */
uart_dev_mu.c:253: uint16_t aux_ier; /* Interrupt mask */
uart_dev_mu.c:313: /* Clear interrupts */
uart_dev_mu.c:315: /* Enable interrupts */
uart_dev_mu.c:392: /* Disable TX interrupt */
uart_dev_mu.c:476: /* Mark busy and enable TX interrupt */
uart_dev_mu.c:494: /* Disable interrupts on switch to polling */
uart_dev_mu.c:509: /* Switch to using interrupts while not grabbed */
uart_dev_mvebu.c:20: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_mvebu.c:62:#define CTRL_TX_HALF_INT (1 << 8) /* TX Half-Full Interrupt Enable */
uart_dev_mvebu.c:63:#define CTRL_RX_HALF_INT (1 << 7) /* RX Half-Full Interrupt Enable */
uart_dev_mvebu.c:64:#define CTRL_TX_EMPT_INT (1 << 6) /* TX Empty Interrupt Enable */
uart_dev_mvebu.c:65:#define CTRL_TX_RDY_INT (1 << 5) /* TX Ready Interrupt Enable */
uart_dev_mvebu.c:66:#define CTRL_RX_RDY_INT (1 << 4) /* RX Ready Interrupt Enable */
uart_dev_mvebu.c:67:#define CTRL_BRK_DET_INT (1 << 3) /* Break Detect Interrupt Enable */
uart_dev_mvebu.c:68:#define CTRL_FRM_ERR_INT (1 << 2) /* Frame Error Interrupt Enable */
uart_dev_mvebu.c:69:#define CTRL_PAR_ERR_INT (1 << 1) /* Parity Error Interrupt Enable */
uart_dev_mvebu.c:70:#define CTRL_OVR_ERR_INT (1 << 0) /* Overrun Error Interrupt Enable */
uart_dev_mvebu.c:233: /* Mask interrupts */
uart_dev_mvebu.c:339: /* Enable interrupts */
uart_dev_mvebu.c:343: /* Set interrupts */
uart_dev_mvebu.c:450: /* Disable TX IDLE Interrupt generation */
uart_dev_mvebu.c:532: * uart_if.m says that receive interrupt
uart_dev_mvebu.c:561: /* Turn off all interrupts during send */
uart_dev_mvebu.c:572: * Make sure that interrupt is generated
uart_dev_mvebu.c:592: /* Mask all interrupts */
uart_dev_mvebu.c:608: /* Restore interrupts */
uart_dev_ns8250.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dev_ns8250.c:82: * Clear pending interrupts. THRE is cleared by reading IIR. Data
uart_dev_ns8250.c:340: /* Disable all interrupt sources. */
uart_dev_ns8250.c:343: * UARTs split the receive time-out interrupt bit out separately as
uart_dev_ns8250.c:500: * by time the interrupt handler is invoked. The hardware will latch the fact
uart_dev_ns8250.c:556: /* Get IER RX interrupt bits */
uart_dev_ns8250.c:971: * interrupt happens.
uart_dev_ns8250.c:1092: * turn off all interrupts to enter polling mode. Leave the
uart_dev_ns8250.c:1094: * All pending interrupt signals are reset when IER is set to 0.
uart_dev_ns8250.c:1110: * Restore previous interrupt mask
uart_dev_ns8250.h:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dev_pl011.c:22: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
uart_dev_pl011.c:104:#define IFLS_LVL_1_8th 0 /* Interrupt at 1/8 full */
uart_dev_pl011.c:105:#define IFLS_LVL_2_8th 1 /* Interrupt at 1/4 full */
uart_dev_pl011.c:106:#define IFLS_LVL_4_8th 2 /* Interrupt at 1/2 full */
uart_dev_pl011.c:107:#define IFLS_LVL_6_8th 3 /* Interrupt at 3/4 full */
uart_dev_pl011.c:108:#define IFLS_LVL_7_8th 4 /* Interrupt at 7/8 full */
uart_dev_pl011.c:110:#define UART_IMSC 0x0e /* Interrupt mask set/clear register */
uart_dev_pl011.c:111:#define IMSC_MASK_ALL 0x7ff /* Mask all interrupts */
uart_dev_pl011.c:113:#define UART_RIS 0x0f /* Raw interrupt status register */
uart_dev_pl011.c:117:#define RIS_FE (1 << 7) /* Framing error interrupt status */
uart_dev_pl011.c:118:#define RIS_PE (1 << 8) /* Parity error interrupt status */
uart_dev_pl011.c:119:#define RIS_BE (1 << 9) /* Break error interrupt status */
uart_dev_pl011.c:120:#define RIS_OE (1 << 10) /* Overrun interrupt status */
uart_dev_pl011.c:122:#define UART_MIS 0x10 /* Masked interrupt status register */
uart_dev_pl011.c:123:#define UART_ICR 0x11 /* Interrupt clear register */
uart_dev_pl011.c:132: * on rev 3 and later. We configure them to interrupt when 3/4 full/empty. For
uart_dev_pl011.c:136: * when the interrupt occurs; uart_core will feed exactly that many bytes to
uart_dev_pl011.c:241: /* Mask all interrupts */
uart_dev_pl011.c:287: uint16_t imsc; /* Interrupt mask */
uart_dev_pl011.c:358: /* Enable interrupts */
uart_dev_pl011.c:362: /* Clear interrupts */
uart_dev_pl011.c:436: /* Disable TX interrupt */
uart_dev_pl011.c:573: /* Mark busy and enable TX interrupt */
uart_dev_pl011.c:591: /* Disable interrupts on switch to polling */
uart_dev_pl011.c:606: /* Switch to using interrupts while not grabbed */
uart_dev_quicc.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dev_quicc.c:301: /* Enable interrupts on the receive buffer. */
uart_dev_quicc.c:498: /* Disable interrupts on the receive buffer. */
uart_dev_quicc.c:513: /* Enable interrupts on the receive buffer. */
uart_dev_snps.c:19: * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
uart_dev_ti8250.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_dev_z8530.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_if.m:21:# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_if.m:88:# ipend() - query UART for pending interrupts.
uart_if.m:89:# When an interrupt is signalled, the handler will call this method to find
uart_if.m:90:# out which of the interrupt sources needs attention. The handler will use
uart_if.m:92:# interrupt sources. An advantage of this approach is that it allows multi-
uart_if.m:94:# service them on an interrupt priority basis. If the hardware cannot provide
uart_if.m:95:# the information reliably, it is free to service the interrupt and return 0,
uart_if.m:121:# additionally should make sure the receive interrupt should be cleared.
uart_if.m:138:# additionally should make sure that a transmit interrupt is generated
uart_if.m:147:# from an interrupt driven state to a polled state that works with the
uart_ppstypes.h:21: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_subr.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_tty.c:23: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
uart_tty.c:36:#include <sys/interrupt.h>
./tests/sys/fs/fusefs/interrupt.cc
./contrib/kyua/utils/signals/interrupts_test.cpp
./contrib/kyua/utils/signals/interrupts_fwd.hpp
./contrib/kyua/utils/signals/interrupts.hpp
./contrib/kyua/utils/signals/interrupts.cpp
./contrib/kyua/integration/helpers/interrupts.cpp
./sys/powerpc/powerpc/interrupt.c
./sys/sys/interrupt.h
./sys/compat/linuxkpi/common/include/linux/interrupt.h
./sys/contrib/device-tree/include/dt-bindings/interrupt-controller
./sys/contrib/device-tree/Bindings/counter/interrupt-counter.yaml
./sys/contrib/device-tree/Bindings/interrupt-controller
./sys/contrib/device-tree/Bindings/interrupt-controller/interrupts.txt
-rw-r--r-- 1 root wheel 8237 Oct 25 04:19 interrupt.h
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src % cd ./sys/contrib/device-tree/include/dt-bindings/interrupt-controller
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/contrib/device-tree/include/dt-bindings/interrupt-controller % ls
apple-aic.h aspeed-scu-ic.h irq.h mips-gic.h
arm-gic.h irq-st.h irqc-rzg2l.h mvebu-icu.h
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/contrib/device-tree/include/dt-bindings/interrupt-controller % ls -lh
total 36
-rw-r--r-- 1 root wheel 414B Oct 25 04:19 apple-aic.h
-rw-r--r-- 1 root wheel 536B Oct 25 04:19 arm-gic.h
-rw-r--r-- 1 root wheel 886B Oct 25 04:19 aspeed-scu-ic.h
-rw-r--r-- 1 root wheel 713B Oct 25 04:19 irq-st.h
-rw-r--r-- 1 root wheel 611B Oct 25 04:19 irq.h
-rw-r--r-- 1 root wheel 550B Oct 25 04:19 irqc-rzg2l.h
-rw-r--r-- 1 root wheel 246B Oct 25 04:19 mips-gic.h
-rw-r--r-- 1 root wheel 357B Oct 25 04:19 mvebu-icu.h
fred@Ghost14-selfbuilt-rpi4B-nginx-tst1:/usr/ghost14/ghostbsd-src/sys/contrib/device-tree/include/dt-bindings/interrupt-controller % less arm-gic.h
/* SPDX-License-Identifier: GPL-2.0 OR MIT */
/*
* This header provides constants for the ARM GIC.
*/
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
#include <dt-bindings/interrupt-controller/irq.h>
/* interrupt specifier cell 0 */
#define GIC_SPI 0
#define GIC_PPI 1
/*
* Interrupt specifier cell 2.
* The flags in irq.h are valid, plus those below.
*/
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
#endif